Pavona Project Advances Open Hardware Chip Components

The GlobalPlatform consortium recently announced the launch of the Pavona project, aimed at developing an open distribution of hardware components that enables the assembly of production-ready secure chips with RISC-V microarchitecture cores. This project offers a modular library of IP blocks and reference chip implementations that are ready for certification and proven for tapeout. By leveraging the elements from this library, users can create their own chips for various applications, ranging from data centers and AI accelerators to resource-constrained embedded systems and IoT devices. The project’s work is released under the Apache 2.0 license.

The project’s founders consist of 12 companies and organizations, including Qualcomm Technologies, Meta, Analog Devices, Baochip, SIMPLE Crypto Association, Tenstorrent, Winbond, and ZeroRISC. It operates on a neutral platform that is independent of individual manufacturers and is managed by a community of participants.

Pavona provides IP blocks featuring RISC-V cores, crypto accelerators supporting classical and post-quantum crypto algorithms, OTP/flash, SRAM, JTAG, ADC, I2C, GPIO, and SPI controllers. The hardware also implements various cryptoalgorithms like HMAC, KMAC, AES, EDN, ASCON, ML-KEM, ML-DSA, DSA-SHA2, and SLH-DSA-SHAKE at the hardware level. The project includes full documentation, Design Verification collateral, and RTL code resources. Additionally, software components such as a cryptographic library for integration with crypto accelerators, firmware, and related utilities are available.

Two reference implementations are provided by the project: a standalone chip with built-in cryptographic capabilities for trusted hardware components (Root of Trust) and a Root of Trust implementation for chiplet architecture using TSMC 3nm (N3) process technology. Chiplets enable the creation of hybrid integrated circuits from independent semiconductor blocks. Pavona stands out as the first project to deliver a production-ready, open on-chip stack with post-quantum cryptography (PQC) algorithm support.

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